Index of /~lisa027/september_16/Users/wml11/Desktop/lisa/backup of ibm/8HPprjs/lisa8HP2

[ICO]NameLast modifiedSizeDescription
[DIR]Parent Directory  -  
[DIR]00_TB_77GHz_CMOS_LNA/16-Sep-2013 16:23 -  
[DIR]00_TB_94GHz_BJT_LNA/16-Sep-2013 16:23 -  
[DIR]00_TB_94GHz_CMOS_LNA/16-Sep-2013 16:23 -  
[DIR]00_TB_94GHz_CMOS_LNA_TEST/16-Sep-2013 16:23 -  
[DIR]00_TB_99GHz_BJT_LNA/16-Sep-2013 16:23 -  
[DIR]00_TB_120GHz_BJT_LNA/16-Sep-2013 16:23 -  
[DIR]00_TB_125GHz_BJT_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_60GHz_CMOS_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_60GHz_CMOS_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_60GHz_CMOS_LNA_SYM/16-Sep-2013 16:23 -  
[DIR]00_TOP_60GHz_CMOS_PA/16-Sep-2013 16:23 -  
[DIR]00_TOP_60GHz_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_77GHz_CMOS_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_77GHz_CMOS_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_94GHz_CMOS_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_94GHz_CMOS_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_94GHz_CMOS_LNA_PAD_TEST/16-Sep-2013 16:23 -  
[DIR]00_TOP_94GHz_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_94GHz_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_99GHz_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_99GHz_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_120GHz_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_120GHz_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_125GHz_LNA/16-Sep-2013 16:23 -  
[DIR]00_TOP_125GHz_LNA_PAD/16-Sep-2013 16:23 -  
[DIR]00_TOP_FINAL/16-Sep-2013 16:23 -  
[DIR]00_TOP_FINAL_CHIPEDGE/16-Sep-2013 16:23 -  
[DIR]00_TOP_FINAL_CHIPEDGE_VER1/16-Sep-2013 16:23 -  
[DIR]01_120GHz_LNA_CE_Cascode_Two_Stage_Strip/16-Sep-2013 16:23 -  
[DIR]01_120GHz_LNA_CE_Cascode_Two_Stage_Strip_ver1/16-Sep-2013 16:23 -  
[DIR]01_120GHz_LNA_CE_Cascode_Two_Stage_Strip_ver2/16-Sep-2013 16:23 -  
[DIR]01_120GHz_LNA_CE_Cascode_Two_Stage_Strip_ver3/16-Sep-2013 16:23 -  
[DIR]02_60GHz_CMOS_LNA/16-Sep-2013 16:23 -  
[DIR]02_94GHz_LNA_CE_Cascode_Two_Stage_Strip/16-Sep-2013 16:23 -  
[DIR]02_120GHz_LNA_CE_Cascode_Two_Stage_Strip/16-Sep-2013 16:23 -  
[DIR]05_94GHz_LNA_low#2dsupply/16-Sep-2013 16:23 -  
[DIR]08_120GHz_Mixer/16-Sep-2013 16:23 -  
[DIR]08_CMOS_60GHz_HALF_CELL/16-Sep-2013 16:23 -  
[DIR]08_CMOS_77GHz_HALF_CELL/16-Sep-2013 16:23 -  
[DIR]08_CMOS_94GHz_HALF_CELL/16-Sep-2013 16:23 -  
[DIR]08_INV_x2/16-Sep-2013 16:23 -  
[DIR]08_LINE/16-Sep-2013 16:23 -  
[DIR]08_LINE_00/16-Sep-2013 16:23 -  
[DIR]08_LINE_01/16-Sep-2013 16:23 -  
[DIR]08_LINE_02/16-Sep-2013 16:23 -  
[DIR]08_LINE_03/16-Sep-2013 16:23 -  
[DIR]08_LINE_04/16-Sep-2013 16:23 -  
[DIR]08_LINE_V/16-Sep-2013 16:23 -  
[DIR]08_LINE_V_01/16-Sep-2013 16:23 -  
[DIR]08_Negative_Gm/16-Sep-2013 16:23 -  
[DIR]08_Negative_Gm_4GHz/16-Sep-2013 16:23 -  
[DIR]08_VIA_VDD_M4#2dMQ/16-Sep-2013 16:23 -  
[DIR]08_VIA_VSS_M3#2dAM/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Mixer/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver2/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver3/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver4/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver5/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver6/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver7/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver8/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver9/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver10/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver11/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver12/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver13/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver14/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver14_1_clk/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver15/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver16/16-Sep-2013 16:23 -  
[DIR]09_40GHz_Sub#2dharmonic_Mixer_ver17/16-Sep-2013 16:23 -  
[DIR]09_94GHz_LNA_CE/16-Sep-2013 16:23 -  
[DIR]09_94GHz_LNA_Diff/16-Sep-2013 16:23 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting__Q/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting_cascode/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting_output_matching/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting_stack/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting_stack_output_matching/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_gm#2dboosting_test/16-Sep-2013 16:24 -  
[DIR]09_94GHz_LNA_Diff_wo_gm#2dboosting/16-Sep-2013 16:24 -  
[DIR]09_120GHz_LNA_CE_Cascode_Two_Stage/16-Sep-2013 16:23 -  
[DIR]09_CC_Cap_Cell/16-Sep-2013 16:24 -  
[DIR]09_CG_LNA/16-Sep-2013 16:24 -  
[DIR]09_CG_LNA_Diff/16-Sep-2013 16:24 -  
[DIR]09_CG_LNA_with_NC/16-Sep-2013 16:24 -  
[DIR]09_Cap_4x4/16-Sep-2013 16:24 -  
[DIR]09_Cap_50x50/16-Sep-2013 16:24 -  
[DIR]09_Cap_Cell/16-Sep-2013 16:24 -  
[DIR]09_Current_LNA/16-Sep-2013 16:24 -  
[DIR]09_Density_Rule_Check/16-Sep-2013 16:24 -  
[DIR]09_Density_Rule_Check_AM/16-Sep-2013 16:24 -  
[DIR]09_Density_Rule_Check_DT_RX/16-Sep-2013 16:24 -  
[DIR]09_Density_Rule_Check_LY/16-Sep-2013 16:24 -  
[DIR]09_Density_Rule_Check_LY_AM/16-Sep-2013 16:24 -  
[DIR]09_INV_x1/16-Sep-2013 16:24 -  
[DIR]09_INV_x2/16-Sep-2013 16:24 -  
[DIR]09_LINE/16-Sep-2013 16:24 -  
[DIR]09_MiM_30ux30u/16-Sep-2013 16:24 -  
[DIR]09_NF_min_CB/16-Sep-2013 16:24 -  
[DIR]09_NPN/16-Sep-2013 16:24 -  
[DIR]09_Negative_Gm/16-Sep-2013 16:24 -  
[DIR]09_Res_4k/16-Sep-2013 16:24 -  
[DIR]09_Res_10k/16-Sep-2013 16:24 -  
[DIR]09_Res_16k/16-Sep-2013 16:24 -  
[DIR]09_VIA_VSS/16-Sep-2013 16:24 -  
[DIR]09_VIA_VSS_M2#2dM3/16-Sep-2013 16:24 -  
[DIR]09_VIA_VSS_M3#2dM4/16-Sep-2013 16:24 -  
[DIR]9_test/16-Sep-2013 16:24 -  
[DIR]9_test2/16-Sep-2013 16:24 -  
[DIR]9_test_cap/16-Sep-2013 16:24 -  
[DIR]9_test_cap11111/16-Sep-2013 16:24 -  
[DIR]90#2dHybrid#2d120G#2dLayout#2dFull/16-Sep-2013 16:24 -  
[DIR]90_Hybrid_94G_Layout_full/16-Sep-2013 16:24 -  
[DIR]90_Hybrid_94G_full/16-Sep-2013 16:24 -  
[DIR]94G_GND_full/16-Sep-2013 16:24 -  
[DIR]120G#2dGND#2dfull/16-Sep-2013 16:24 -  
[DIR]ACpath_LVS/16-Sep-2013 16:24 -  
[DIR]Amp_94G_v1/16-Sep-2013 16:24 -  
[DIR]Amp_94G_v2/16-Sep-2013 16:24 -  
[DIR]Amp_94G_v3/16-Sep-2013 16:24 -  
[DIR]Amp_94G_v4/16-Sep-2013 16:24 -  
[DIR]Amp_120G_cell/16-Sep-2013 16:24 -  
[DIR]Amp_120G_v1/16-Sep-2013 16:24 -  
[DIR]Amp_120G_v2/16-Sep-2013 16:24 -  
[ ]JY_Wideband_LNA.TopCat%13-Mar-2013 12:18 113  
[DIR]LNA#2d120G_cell/16-Sep-2013 16:24 -  
[DIR]LNA_1stage/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_combined_LVS/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_pmos/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_pmos_DCcurrent/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_pmos_LVS/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_pmos_checking/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_pmos_combined/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_pmos_linv1/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_real/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_real_excludepmos/16-Sep-2013 16:24 -  
[DIR]LNA_1stage_without_coupling/16-Sep-2013 16:24 -  
[DIR]LNA_94G/16-Sep-2013 16:24 -  
[DIR]LNA_94G_cascode_checking/16-Sep-2013 16:24 -  
[DIR]LNA_94G_switchcell/16-Sep-2013 16:24 -  
[DIR]LNA_94Gcell/16-Sep-2013 16:24 -  
[DIR]LNA_94Gswitchcell/16-Sep-2013 16:24 -  
[DIR]LNA_120G/16-Sep-2013 16:24 -  
[DIR]LNA_120GHz/16-Sep-2013 16:24 -  
[DIR]LNA_120G_LVS/16-Sep-2013 16:24 -  
[DIR]LNA_120G_cascade/16-Sep-2013 16:24 -  
[DIR]LNA_120G_cell/16-Sep-2013 16:24 -  
[DIR]LNA_120G_combinedcell/16-Sep-2013 16:24 -  
[DIR]LNA_120Gnew_cheking/16-Sep-2013 16:24 -  
[DIR]LNA_120Goriginal_checking/16-Sep-2013 16:24 -  
[DIR]LNA_journal/16-Sep-2013 16:24 -  
[DIR]LNA_journal1/16-Sep-2013 16:24 -  
[DIR]LNA_journal3/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real1/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real2/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real_2stage/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real_2stage_2/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real_pin/16-Sep-2013 16:24 -  
[DIR]LNA_journal3_coupled_real_pin_backup/16-Sep-2013 16:24 -  
[DIR]LNA_journal_coupledind/16-Sep-2013 16:24 -  
[DIR]LNA_onestage/16-Sep-2013 16:24 -  
[DIR]LNA_onestage_LVS/16-Sep-2013 16:24 -  
[DIR]LNA_onestagemodifiedlayout/16-Sep-2013 16:24 -  
[DIR]LNA_onestagemodifiedlayout1/16-Sep-2013 16:24 -  
[DIR]LNAcore_94G/16-Sep-2013 16:24 -  
[DIR]LNAcore_120G/16-Sep-2013 16:24 -  
[DIR]LNAcore_120G_checking/16-Sep-2013 16:24 -  
[DIR]LNAswitch_input/16-Sep-2013 16:24 -  
[DIR]LVS_94G/16-Sep-2013 16:24 -  
[DIR]LVS_120G/16-Sep-2013 16:24 -  
[ ]Lisa8HP2.TopCat13-Mar-2013 12:18 99  
[DIR]NF_bias/16-Sep-2013 16:24 -  
[DIR]Phase_array_94G_final/16-Sep-2013 16:24 -  
[DIR]Phase_array_120G_final/16-Sep-2013 16:24 -  
[DIR]Phase_array_controller/16-Sep-2013 16:24 -  
[DIR]Phase_array_using_symbol/16-Sep-2013 16:24 -  
[DIR]Phase_shifter_LVSclean/16-Sep-2013 16:24 -  
[DIR]Phase_shifting_control_symbol/16-Sep-2013 16:24 -  
[DIR]Qphase_shft/16-Sep-2013 16:24 -  
[DIR]Symbol_Hybrid_switch/16-Sep-2013 16:24 -  
[DIR]TEMP2/16-Sep-2013 16:24 -  
[ ]TEST_BENCH.Cat13-Mar-2013 12:18 303  
[ ]TEST_BENCH.Cat%13-Mar-2013 12:18 345  
[ ]TOP_FINAL.Cat13-Mar-2013 12:18 489  
[ ]TOP_FINAL.Cat%13-Mar-2013 12:18 559  
[DIR]bend_ind/16-Sep-2013 16:24 -  
[DIR]bias_LVS/16-Sep-2013 16:24 -  
[DIR]bias_v1/16-Sep-2013 16:24 -  
[DIR]biasing/16-Sep-2013 16:24 -  
[DIR]biasing1/16-Sep-2013 16:24 -  
[DIR]breakdown/16-Sep-2013 16:24 -  
[DIR]capacitance_test/16-Sep-2013 16:24 -  
[ ]cdsinfo.tag19-Nov-2012 18:21 1.3K 
[DIR]check_LNA/16-Sep-2013 16:24 -  
[ ]data.dm13-Mar-2013 12:18 3.7K 
[DIR]hw/16-Sep-2013 16:24 -  
[DIR]journa_AC/16-Sep-2013 16:24 -  
[DIR]journal/16-Sep-2013 16:24 -  
[DIR]journal1/16-Sep-2013 16:24 -  
[DIR]journal2/16-Sep-2013 16:24 -  
[DIR]journal3/16-Sep-2013 16:24 -  
[DIR]journal22/16-Sep-2013 16:24 -  
[ ]layout.oa.cvl01.ece.vt.edu.13334.20121118213044.tmp.a19-Nov-2012 18:21 0  
[ ]layout.oa.cvl01.ece.vt.edu.23159.20121117204357.tmp.a19-Nov-2012 18:21 0  
[ ]layout.oa.cvl13.ece.vt.edu.6479.20120316111838.tmp.a13-Mar-2013 12:18 44K 
[DIR]output_Switch/16-Sep-2013 16:24 -  
[DIR]pad_sig_gsg/16-Sep-2013 16:24 -  
[DIR]pad_unitcell/16-Sep-2013 16:24 -  
[DIR]performance_test_switch1/16-Sep-2013 16:24 -  
[DIR]ph_shifter/16-Sep-2013 16:24 -  
[DIR]ph_shifter_120G/16-Sep-2013 16:24 -  
[DIR]ph_shifter_with_LNA/16-Sep-2013 16:24 -  
[DIR]ph_shifter_with_LNA_pmos/16-Sep-2013 16:24 -  
[DIR]ph_shifter_with_LNA_pmos_pss/16-Sep-2013 16:24 -  
[DIR]phase_array/16-Sep-2013 16:24 -  
[DIR]phase_array_120G/16-Sep-2013 16:24 -  
[DIR]phase_shifter94G_LVS/16-Sep-2013 16:24 -  
[DIR]phase_shifter94G_LVSclean/16-Sep-2013 16:24 -  
[DIR]prac1/16-Sep-2013 16:24 -  
[DIR]prac1_temp/16-Sep-2013 16:24 -  
[DIR]resistance_test/16-Sep-2013 16:24 -  
[DIR]temp/16-Sep-2013 16:24 -  
[DIR]temp_0/16-Sep-2013 16:24 -  
[DIR]temp_Amp_94G_v1_LVS/16-Sep-2013 16:24 -  
[DIR]temp_bias_2/16-Sep-2013 16:24 -  
[DIR]temp_bias_v3/16-Sep-2013 16:24 -  
[DIR]temp_res/16-Sep-2013 16:24 -  
[DIR]temp_t/16-Sep-2013 16:24 -  
[DIR]temp_top/16-Sep-2013 16:24 -  
[DIR]tempv4/16-Sep-2013 16:24 -  
[DIR]test2/16-Sep-2013 16:24 -  
[DIR]test_RC/16-Sep-2013 16:24 -  
[DIR]transmission_line/16-Sep-2013 16:24 -  
[DIR]tst1/16-Sep-2013 16:24 -  
[ ]tstDRC.alc19-Nov-2012 18:21 708  
[ ]tstDRC.ant19-Nov-2012 18:21 0  
[ ]tstDRC.bbc19-Nov-2012 18:21 1  
[ ]tstDRC.bcr19-Nov-2012 18:21 5.5M 
[ ]tstDRC.dat19-Nov-2012 18:21 5.6M 
[ ]tstDRC.dvc19-Nov-2012 18:21 20  
[ ]tstDRC.elf19-Nov-2012 18:21 134  
[ ]tstDRC.env19-Nov-2012 18:21 181  
[ ]tstDRC.erd19-Nov-2012 18:21 1.2M 
[ ]tstDRC.err19-Nov-2012 18:21 1.0M 
[ ]tstDRC.erx19-Nov-2012 18:21 76  
[ ]tstDRC.hdr19-Nov-2012 18:21 103  
[ ]tstDRC.ilc19-Nov-2012 18:21 1.3K 
[ ]tstDRC.ler19-Nov-2012 18:21 1.1K 
[ ]tstDRC.log19-Nov-2012 18:21 457K 
[ ]tstDRC.lyr19-Nov-2012 18:21 472K 
[ ]tstDRC.map19-Nov-2012 18:21 45K 
[ ]tstDRC.msg19-Nov-2012 18:21 121K 
[ ]tstDRC.nrc19-Nov-2012 18:21 4.0K 
[ ]tstDRC.rsf19-Nov-2012 18:21 777  
[ ]tstDRC.sum19-Nov-2012 18:21 1.2M 
[ ]tstDRC.svi19-Nov-2012 18:21 10  
[ ]tstDRC.tmp19-Nov-2012 18:21 0  
[ ]tstDRC.trm19-Nov-2012 18:21 0  
[ ]tstDRC.xcn19-Nov-2012 18:21 797  
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