ptft


Model Description


This model was implemented based on the published equations of Prof.
Michael Shur of Rensselaer Polytechnic Institute.

References


T. Fjeldly, T. Ytterdal, and M. S. Shur, Introduction to Device and Circuit
Modeling for VLSI, John Wiley and Sons, New York, ISBN 0-471-15778-3 (1998)

K. Lee, M. Shur, T. A. Fjeldly and T. Ytterdal, Semiconductor Device
Modeling for VLSI, 1993, Prentice Hall, New Jersey.

B. Iniguez, T. A. Fjeldly, M. S. Shur, T. Ytterdal, Spice Modeling
of Compound Semiconductor Devices, in Silicon and Beyond.

Advanced Device Models and circuit simulators, M. S. Shur and T. A. Fjeldly,
Editors, World Scientific, 2000, pp. 55-112

B. Iniguez, T. Ytterdal, T. A. Fjeldly and M. S. Shur, "Thin Film Transistor
Modeling for AMLCD,in Digest of the International Workshop on
Active-Matrix Liquid-Crystal Displays (AM-LCD 02), pp. 61-64, Tokyo, Japan,
July 2002 (invited)

H. C. Slade, M. S. Shur, and T. Ytterdal, Characterization and modeling of
frequency dispersion in a-Si Thin Film Transistors, Mat. Res. Soc. Symp.
Proc. Vol. 467, pp. 881-886 (1997)

M. S. Shur, H. C. Slade, M. D. Jacunski, A. A. A. Owusu, and
T. Ytterdal, SPICE Models for Amorphous Silicon and Polysilicon Thin Film
Transistors, J. Electrochem. Soc. Vol. 144, No. 8, pp. 2833-2839, (1997)

M. D. Jacunski, M. S. Shur, A. A. A. Owusu, T. Ytterdal, M. Hack, and B.
Iniguez, A Short-Channel DC SPICE Model for Polysilicon Thin Film
Transistors Including Temperature Effects, IEEE Trans. Electron Dev.,
Vol. 46, N0. 6, pp. 1146- 1158, June (1999)

Parameter Values

NameDescriptionDefault ValueRangeType
NoiseNote: noise is not yet supported1 from [0:1] integer
TriseDifference sim. temp and device temp [C deg]0.0 from [-inf:inf] real
TempDevice temp [C deg]-- from (-273.15:inf] real
LLength [m]1.0e-6 from (0:inf] real
WWidth [m]1.0e-6 from (0:inf] real
AsatVDS,sat paramter1.0 from [0:inf] real
AtThreshold VDS coeff3.0e-8 from [0:inf] real
BlkDIBL parameter0.001 from [0:inf] real
BtThreshold length coefficient1.96e-6 from [0:inf] real
CgdoD-G overlap capacitance [F]0.0 from [0:inf] real
CgsoD-G overlap capacitance [F]0.0 from [0:inf] real
DasatAlpha_sat temp coeff0.0 from [0:inf] real
DdDrain electric field param1400e-10 from [0:inf] real
DgGate electric field param2000e-10 from [0:inf] real
Dmu1Low field mobility temp coeff 0.0 from [0:inf] real
DvtDiff between Von and Vt0.0 from [0:inf] real
DVtoThreshold temp coeff0.0 from [0:inf] real
EbDiode Leakage Barrier0.68 from [0:inf] real
EtaSub-Vt ideality factor7.0 from [0:inf] real
EtaC0Cap sub-th ideality at Vd = 0Eta from [0:inf] real
EtaC00Cap sub-th coef of drain bias0 from [0:inf] real
I0TFE Leakage Coeff6 from [0:inf] real
I00Diode Leakage Coeff150 from [0:inf] real
Lasatalpha_sat length coeff6.7e-7 from [0:inf] real
LkinkLength coefficient1.9e-5 from [0:inf] real
McCapacitance knee shape parameter3.0 from [0:inf] real
MkFeedback exponent1.3 from [0:inf] real
MmuLow field mobility coeff 3.0 from [0:inf] real
Mu0Low field mobility100 from [0:inf] real
Mu1Low field mobility parameter2.2e-3 from [0:inf] real
MusLong channel threshold0.1 from [0:inf] real
RdDrain resistance [Ohm]0.0 from [0:inf] real
RdXDrain resistance in series w/Cgd [Ohm]0.0 from [0:inf] real
RsSource resistance [Ohm]0.0 from [0:inf] real
RsXSource resistance in series w/Cgs [Ohm]0.0 from [0:inf] real
TnomParam meas temp [C]25 from (-273.15:inf) real
ToxThin-oxide thickness [m]1.0e-7 from [0:inf] real
VfbFlat band voltage [V]-0.1 from [-inf:inf] real
VkinkElectric field param9.1 from [0:inf] real
VonOn-voltage [V]0.0 from [0:inf] real
VtoZero-bias threshold voltage [V]- from [0:inf] real
NMOS1 from [0:1] integer
PMOS0 from [0:1] integer

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