atft

Model Description

This model was implemented based on the published equations of Prof.
Michael Shur of Rensselaer Polytechnic Institute.

References

T. Fjeldly, T. Ytterdal, and M. S. Shur, Introduction to Device and Circuit
Modeling for VLSI, John Wiley and Sons, New York, ISBN 0-471-15778-3 (1998)

K. Lee, M. Shur, T. A. Fjeldly and T. Ytterdal, Semiconductor Device
Modeling for VLSI, 1993, Prentice Hall, New Jersey.

B. Iniguez, T. A. Fjeldly, M. S. Shur, T. Ytterdal, Spice Modeling
of Compound Semiconductor Devices, in Silicon and Beyond.

Advanced Device Models and circuit simulators, M. S. Shur and T. A. Fjeldly,
Editors, World Scientific, 2000, pp. 55-112

B. Iniguez, T. Ytterdal, T. A. Fjeldly and M. S. Shur, "Thin Film Transistor
Modeling for AMLCD,in Digest of the International Workshop on
Active-Matrix Liquid-Crystal Displays (AM-LCD 02), pp. 61-64, Tokyo, Japan,
July 2002 (invited)

H. C. Slade, M. S. Shur, and T. Ytterdal, Characterization and modeling of
frequency dispersion in a-Si Thin Film Transistors, Mat. Res. Soc. Symp.
Proc. Vol. 467, pp. 881-886 (1997)

M. S. Shur, H. C. Slade, M. D. Jacunski, A. A. A. Owusu, and
T. Ytterdal, SPICE Models for Amorphous Silicon and Polysilicon Thin Film
Transistors, J. Electrochem. Soc. Vol. 144, No. 8, pp. 2833-2839, (1997)

M. D. Jacunski, M. S. Shur, A. A. A. Owusu, T. Ytterdal, M. Hack, and B.
Iniguez, A Short-Channel DC SPICE Model for Polysilicon Thin Film
Transistors Including Temperature Effects, IEEE Trans. Electron Dev.,
Vol. 46, N0. 6, pp. 1146- 1158, June (1999)

Parameter Values

Name	Description	Default Value	Range	Type
Noise	Note: Noise is not yet supported	1	from [0:1]	integer
Trise	Difference sim. temp and device temp [C deg]	0.0	from [-inf:inf]	real
Temp	Device temp [C deg]	--	from (-273.15:inf]	real
L	Length [m]	1.0e-6	from (0:inf]	real
W	Width [m]	1.0e-6	from (0:inf]	real
AlphaSat	VDS, sat paramter	0.6	from [0:inf]	real
Cgdo	D-G overlap capacitance [F]	0.0	from [0:inf]	real
Cgso	D-G overlap capacitance [F]	0.0	from [0:inf]	real
Def0	Dark Fermi level pos	0.6	from [0:inf]	real
Delta	Transition param	5	from [0:inf]	real
El	Act energy of hole leakage	0.35	from [0:inf]	real
Emu	Field effect mobility act energy	0.06	from [0:inf]	real
Eps	Relative diel const of substr	11	from [0:inf]	real
Epsi	Relative diel const of gate ins	7.4	from [0:inf]	real
Gamma	Power law mobility param	0.4	from [0:inf]	real
Gmin	Min density of deep states	1.0e23	from [0:inf]	real
Iol	Zero bias leakage current [A]	3.0e-14	from [-inf:inf]	real
KaSat	Temp coeff. of AlphaSat	0.006	from [-inf:inf]	real
Kvt	Thr voltage temp coef	-0.036	from [-inf:inf]	real
Lambda	Feedback exponent	0.0008	from [0:inf]	real
M	Knee shape parameter	2.5	from [-inf:inf]	real
MuBand	Conduction band mobility	0.001	from [-inf:inf]	real
Rd	Drain resistance [Ohm]	0.0	from [0:inf]	real
Rs	Source resistance [Ohm]	0.0	from [0:inf]	real
Sigma0	Min leakage curr param	1.0e-14	from [-inf:inf]	real
Tnom	Parm meas temp [C]	--	from (-273.15:inf)	real
Tox	Thin-oxide thickness [m]	1.0e-7	from [0:inf]	real
V0	Char voltage for deep states [V]	0.12	from [-inf:inf]	real
Vaa	Char voltage: field effect mob [V]	7.5e3	from [-inf:inf]	real
Vdsl	Hole leakage current drain voltage [V]	7.0	from [-inf:inf]	real
Vfb	Flat band voltage [V]	-3.0	from [-inf:inf]	real
Vgsl	Hole leakage current gate voltage [V]	7.0	from [-inf:inf]	real
Vmin	Convergence parameter [V]	0.3	from [-inf:inf]	real
Vto	Zero-bias threshold voltage [V]	0.0	from [0:inf]	real
NMOS		1	from [0:1]	integer
PMOS		0	from [0:1]	integer