STRATEGATE Sequential Circuit Test Generator Executable

STRATEGATE, a sequential circuit automatic test pattern generation (ATPG) tool, consists of (1) a sequential test generator and (2) a sequentially untestable fault identification engine. The sequential test generator is based on the technique described in the following papers:

Michael S. Hsiao, Elizabeth M. Rudnick, and Janak H. Patel, "Sequential circuit test generation using dynamic state traversal," Proceedings of the IEEE European Design and Test Conference, 1997, pp. 22-28.
Michael S. Hsiao, Elizabeth M. Rudnick, and Janak H. Patel, "Dynamic state traversal for sequential circuit test generation," in the ACM Transactions on Design Automation of Electronic Systems, vol. 5, no. 3, pp. 548-565, July, 2000.

And the sequentially untestable fault engine is based on the following paper:

Michael S. Hsiao, "Maximizing impossibilities for untestable fault identification," Proceedings of the IEEE Design Automation and Test in Europe Conference, March, 2002, pp. 949-953.

The binary executable is free for download, with the provision of your name, email, and purpose for using the tool.

Usage:
strategate [-ih] ckt_name seed

Input Files: ckt_name.bench
Main Output Files: ckt_name.ls_vec, ckt_name.ls_stats
seed is between 0 and 9.
The h option is to apply vector holding
the i option is to initialize the ckt with the state stored in ckt_name.initState
Example: ./strategate_new s27 0
Example2: ./strategate_new -h s298 1
Example3: ./strategate_new -ih s526 2
The output vector file is continually updated, so one may stop strategate when the desired coverage is reached.

To download, please fill out the following form:

Please type your name and email address in the boxes below, then click the Submit button. A window with the downloadable program (link) will appear.